An alternative to integrating the memory on-chip is to use a separate DRAM IC bare die stacked in a two-die package. Because of the nearly 100 bond wires needed to interconnect a ×16 type DDR3 die to ...

Wide I/O is a memory interface standard for 3D IC produced by JEDEC (JESD229). The basic concept is to use a very large number of pins, each of which is relatively slow but low powered. These concepts ...

Dive In: The Z80 [Ken] wastes no time and dives straight into a die shot of the Z80 8-bit CPU. He starts out by labeling the landing pads that connect to external pins by cross-referencing them ...

Siemens Digital Industries Software unveiled a pair of products to aid designers of 2.5D and 3D integrated circuits.

Reset pin 12 resets the timing cycle once it is grounded. Outputs can give almost full supply voltage to drive light loads. Heavy loads such as relay can be operated through a driver transistor. When ...

Man I thought I was special for coming up with this trick on my own. Mine has a variation though. I threaded long 30 awg wire behind the pins on one side of a QFP chip.

To understand the details behind the new dimming IC, we should first look at the IR2520D, an existing 8-pin, non-dimming ballast-control IC used in a variety of fluorescent lighting applications ...

The memory market will grow 10% next year, says IC Insights, and will be worth $85.3 billion as a result of ASP rises in DRAM and NAND. After increasing by more than 20% in both 2013 and 2014, the ...