Hackaday6y
Free ARM Cores For Xilinx FPGAs
For developers on Xilinx FPGAs they have extended the offer ... If you arrive in the world of work already used to working with ARM IP at the FPGA level then you are more likely to be on their ...
Hackaday4y
Xilinx Makes MIPI CSI And DSI Controller IP Blocks Free To Use With Vivado
As of the Xilinx Vivado 2020.1 release, the MIPI DSI (display serial interface) and CSI (camera serial interface) IP blocks are now bundled with the IDE to be used freely with Xilinx FPGAs.
Design-Reuse4d
Xilinx Bluetooth IP Core
Ceva-Waves Bluetooth 5.3 dual mode IP is a complete and flexible solution for integration into SoCs/ASSPs. It contains both "classic" BR/EDR Bluetooth and Bluetooth Low Energy and is compatible ...
Design-Reuse18d
Xilinx SATA IP Core
The host and device connections are speed independent ... The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST XV5 ...
CRN3y
AMD Completes $49B Xilinx Acquisition, Largest Chip Deal In History
“The acquisition of Xilinx brings together a highly complementary set of products, customers and markets combined with differentiated IP and world-class talent to create the industry’s high ...